Research And Implementation On Radar Wideband Intermediate Frequency Signal Simulator

Radar Signal Simulator is of significant importance for system development and performance evaluation.Digital Radio Frequency Memory(DRFM)is the key and difficult part in the realization of radar signal simulator.In this paper,the radar intermediate frequency simulator system and digital signal processing algorithms are analyzed and realized.The contents are as follows:In the first chapter,we introduce the background and significance of the research,and then analyze the related work domestic and overseas.The structure of this dissertation is presented at the end of this chapter.In the second chapter,we study the principle and hardware implementation of DRFM and digital receiving technology.We also analyzed the implementation method of other functional units,e.g.,wide band digital modulation/demodulation in FPGA,data writing and reading via CPCI bus,and inter-board data transmission via optical fiber.In the third chapter,we study the all-digital Quadrature Demodulation(QD)method targeting at Linear Frequency Modulation(LFM)waveform.We propose an enhanced filtering algorithm to implement wideband complex coefficient correction,which address the mismatch issue between the high speed data stream of the front-end A/D output and the low speed back-end digital signal processing unit,thus the filtering can be implemented in real-time.The correctness and efficiency of the algorithm is validated by simulation with Matlab.In the fourth chapter,we realize the key algorithms of the radar simulator in FPGA.We first present the system architecture and then introduce the structures of the functional units like DAC configuration via SPI bus,all-digital Quadrature Modulation/Demodulation,and wideband complex coefficient filtering.Experimental results indicate that the real-time filter's performance matches the design requirements.