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Design And Implementation Of High Speed DAC Circuit In Digital Radio Frequency Memory System

Posted on:2017-02-25Degree:MasterType:Thesis
Country:ChinaCandidate:D D WangFull Text:PDF
GTID:2308330503982461Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of electronic warfare technology, digital radio frequency memory gradually applied to radar systems. In recent years, with the development of high-speed integrated circuits, the development of the radar system has been further improved. However, the bandwidth and sampling rate of digital radio frequency memory limits the development of radar systems. To solve above problem, high-speed digital to analog conversion circuit be used in digital radio frequency memory system.Firstly, according to the technical index of system select the appropriate chip. FPGA module, data conversion module, clock module, power management module, level conversion module were designed in detail. This paper draws the PCB based on the schematic diagram. According to the characteristics of digital radio frequency memory system, we proposed the problems that need to be paid attention to in drawing PCB process. After drawing the PCB, the circuit board went into production.Secondly, we designed the logic function of digital radio frequency memory. FPGA uses the direct digital frequency synthesis technology to produce the frequency controllable digital signal. And we simulate digital signal generation module in the time domain and frequency domain. In FPGA, exchange the parallel data to the serial data, which provides the digital signal for the system. Design and Simulate the Clock logic of digital radio frequency memory system.Finally, the digital radio frequency memory system is debugged, The important parameters of the system are tested, such as the window of the system, the spurious free dynamic range, the flatness and so on. According to the test results, it is obvious that the design of system achieve the intended target. The 8GSPS sampling rate, the 4GHz bandwidth, and the spurious free dynamic range of the high speed digital radio frequency memory system are realized.
Keywords/Search Tags:digital radio frequency memory, digital-analog converter, FPGA, signal integrity
PDF Full Text Request
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