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The Design Of Digital Radio Frequency Memory Based On FPGA

Posted on:2008-01-16Degree:MasterType:Thesis
Country:ChinaCandidate:S Z ZhaoFull Text:PDF
GTID:2178360212995346Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
The digital radio frequency memory (DRFM) has the capability to storage, processing and throughput for the radio-frequency signal and the microwave signal, it has developed an important component of the modern radar system.Generally, the modern radar has used the pulse compression, the phase encoding and more complex signal processing technology and so on, because the DRFM has the ability to handle the coherence technique, so, it is widely applied to the electronic countermeasure for the radio frequency source more and more.At present, the research of the DRFM technology is in start phase at home and abroad. The sampling rate as well as sampling precision aspect and storage capacity, has already could not satisfy the demand of modern radar signal.Firstly, this paper introduces the classification, composing and operation principles of DRFM. One kind of easy to realize for project design method is presented based on the existing research results. According to design method that presented, this paper designed one scheme of the amplitude quantizing DRFM based on the field programmable gate array. The sample rate we select for the presented scheme is 1 GHz and the sample precision is 12 bits. In fact, we interleave four ADC (250 MHz) parallel processing to reach 1 Gsps. In the single channel, we used the digital orthogonal sampling technology for the coherent detection, in order to preserve all the information of duplicate envelope signal. The field programmable gate array is applied in this system for controller as well as data storage.Secondly, the Very High Speed Hardware Description Language (VHDL) is used to realize the design of DRFM circuit based on FPGA and the function simulation and the sequence analysis. Many of the Low Voltage DifferentialSignaling (LVDS) chip is used in the system, so the power consume of the DRFM is reduced greatly and the stability of the system is improved.Finally, in this paper, the digital signal-processing algorithm that used to the design has carried on the simulation, the result has proven the design feasibility.Compare with the DRFM system based on special-purpose FIFO memory, the DRFM system based on FPGA that is presented in this paper has the higher performance index and the superiority.
Keywords/Search Tags:Digital Radio Frequency Memory (DRFM), FPGA, Low Voltage Differential Signaling (LVDS), amplitude quantizing, VHDL
PDF Full Text Request
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