Research Of Arbiter PUF Technology Based On FPGA

Arbiter Physical Unclonable Function(APUF)exploits the gate delay affected by the fabrication variations when signals propagating on chips.By comparing the signal propagation delay of two symmetric paths,arbiter PUF produces responses determined by each chip.As a typical strong PUF,arbiter PUF provides a huge number of challenge-response pairs(CRPs),which can be used in chip identification and device authentication fields.When implemented on Field Programmable Gate Arrays(FPGAs),the routes of arbiter PUF might be affected by the internal wiring restrictions of FPGAs,and lead to the two signal paths of arbiter PUF cannot be completely symmetrical,which will result the randomness of arbiter PUF responses is not ideal.In this paper,a method to improve the randomness of arbiter PUF responses is proposed.An automatic adjustment circuit is used to adjust the inputs of the arbiter PUF adjustment block based on FPGA,which causes a delay bias between the two paths on the adjustment block and compensate the delay bias caused by the asymmetry of the routing.Finally the randomness of the arbiter PUF responses is improved.The automatic adjustment circuit designed in this paper is composed of challenges ROM,counter,comparator and a calculation module.By initializing the inputs of the adjustment block,the randomness of the arbiter PUF responses is calculated when a large number of challenges are input.According to the value of the randomness,the calculation module constantly can change the inputs of the adjustment block.When the delay bias in the arbiter PUF adjustment block can compensate the asymmetric delay bias of the routes,the automatic adjustment process is ended.At this point,the randomness of the arbiter PUF responses is within the acceptable error range.The simulation result of Isim shows that the automatic adjustment circuit can achieve the function of improving the randomness of arbiter PUF.The automatic adjustment circuit which aim to improve the arbiter PUF response randomness is experimented on Xilinx Spartan6 FPGA development platform,and the experiment results demonstrate that the automatic adjustment circuit can improve the randomness of the arbiter PUF,and the time cost is smaller than that of the traditional method.