Research On Reliability Of Physical Unclonable Function Based On FPGA

With the proliferation of IoT devices,its security issues have become an important issue.The traditional encryption method is usually based on the key for authentication and encryption,but the key is generally stored in the Non-volatile memory(NVM),which is vulnerable to intrusive and non-intrusive attacks,resulting in key leakage,it will cause the system protection mechanism to fail.The physical unclonable function is an encryption primitive that uses the inherent manufacturing variations of the CMOS manufacturing process to generate a signature unique for each device,it provides efficient,secure,and low-cost identification and authentication of the chip.PUF breaks the limitations of traditional secure key storage methods.Since there is no need to store keys,the problems of the traditional methods can be well solved.FPGAs have become increasingly used in security systems,typically for secure key management and for generating digital identifiers(IDs)in IoT devices.Due to the inherent characteristics of FPGAs,ring oscillator-based PUFs have been widely implemented on FPGAs.However,RO PUF typically has high hardware overhead,and it is difficult to guarantee its reliability due to complex operating environments.A configurable RO PUF design has been proposed in this work,which can use only two ring oscillators to obtain a variety of different process variations,and through post-screening,effectively improves PUF performance.First,analyzed the effect of the programmable delay line on the path delay.By configuring the ring oscillator,improved the reliability of the RO PUF and obtained good randomness(pass the NIST test).Second,optimized the above structure.The proposed structure averages only 2 slices to generate a 16-bit reliable response.Experimental results show that the proposed PUF has low hardware overhead,and multiple measurements under a wide range of operating environments demonstrate that it is highly reliable.