Design And Implementation Of Dual-mode Digital Channelized Receiver

As the modern Electronic Warfare (EW) environment become more and more complicated,the channelized receiver is also continuously development. Currently,channelized receivers can achieve large instantaneous bandwidth, high sensitivity, real-time interception, multiple signals processing, etc, and they plays a very important role in the military warfare, but the problems of "Cross channels","Spectrum splitting" caused by uniform channelization are still a hot research topic. For this problems, we proposed a novel structure receiver witch has two modes, and does the hardware implementations of the receiver. The system includes the mode of digital channelized and the mode of parallel structure of digital down conversion (Parallel DDC). When the situation of cross channels is detected in the mode of digital channelized mode, the receiver will switch to the parallel DDC mode automatically that can capture the complete signal. The receiver system can preset working mode or working in two modes simultaneously. This paper focus on non-cooperative radar signals, to capture them witch are within the bandwidth of 300MHz and the intermediate frequency of 450MHz, and it can solve the cross-channels situation when the signal's bandwidth is less than 75MHz. The main works of the paper is as follows:Firstly,we described the background and significance of the paper,introduced the current situation and the development trend of digital channelized receiver, researched the structure of digital channelized receiver and the related theory that including: bandpass samping theory, multirate signal processing, polyphase filter structure, numerically controlled oscillator (NCO),parallel IFFT,CORDIC algorithm,FIR filter, FFT spectrum analysis,instantaneous feature extraction, etc. Then using the Matlab software to simulation and analyse them.Secondly, in order to solve the problem of cross channels, We based on the principles of hardware implementation, make an analysis on the current algorithms of reconstruction and the limitations of the algorithms in application, put forward a scheme of dual mode digital channelized receiver. The scheme retain the mature technology of channelized receiver, at the same time, solving the problem of cross channels by the parallel DDC mode. The scheme enhanced the flexibility of receiver.Then, in the ISE environment. We utilize the Xilinx's IP core rational, finished the logic design and implement of the receiver modules by Verilog HDL languages, and finished the functional simulation of modules and whole system by Modelsim software. We optimized the two modes CORDIC algorithm,put forward the fast convergence CORDIC algorithm and the improved vector mode CORDIC algorithm, they can be applied in the module of numerically controlled oscillator and the module of instantaneous feature extraction respectively, reducing the hardware resources, iterations and the delay.Finally, We finished the configuration of high-speed ADC and the data processing of LVDS, debugged in hardware platform, completed the dual mode digital channelized receiver.We builded a test platform which combined with the ChipScope of Xilinx, and made the function test and performance test of the receiver. The test results verify that the dynamic range of receiver is about 35dB. The receiver has a certain value in engineering.