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Study And Implementation Of BPSK Modem Algorithm Based On FPGA

Posted on:2017-02-19Degree:MasterType:Thesis
Country:ChinaCandidate:Z Q DongFull Text:PDF
GTID:2348330518970727Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
In recent years, with the increasing demand for ocean development, long-distance,high-performance and high-speed underwater acoustic communication has been a hot topic for researchers. In this paper, A theoretical analysis of the Binary Phase Shift Keying (BPSK)modem algorithm is carried out, as well as its practical implementation on Field-Programmable Gate Array (FPGA) using multiple signal processing IP core and other flexible development tools.First, incorporating the fundamentals of BPSK modem algorithm, some key technology of BPSK modem algorithm are further discussed, such as numerically controlled oscillator(NCO), shaping filter, carrier synchronization and timing recovery. According to the design requirements of communication system, Costas digital phase-locked loop are applied for carrier synchronization, and Gardner synchronization ring for timing recovery. And a simulation is conducted in Matlab to verify parameters and feasibility of synchronization loop.Then, the algorithm is rewritten in Verilog language to implement hardware description of BPSK modem system. And function simulation results of the very critical signals on FPGA prove algorithm correct. Finally, designing and debugging upper computer software to complete the communication between upper machine and FPGA.Results of tank experiments indicate that Costas loop can effectively track and compensate small frequency offset in transmission, while Gardner loop can compensate timing offset. Therefore, when the communication range is relatively short and channel multi-path effect is relatively slight, the comparative results of estimated data and meta-data indicate a zero Bit Error Rate and a good distribution of the constellation,verify that the modem algorithm design has reached pre-concerted objective.
Keywords/Search Tags:BPSK modulation, Costas loop, Gardner loop, FPGA
PDF Full Text Request
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