Digital Implementation And Studies On Algorithm Of Carrier Synchronization Under High Dynamic Circumstances

Carrier frequency estimation is a significant problem in wireless communication.Based on the design and realization of an all-digit receiver for remote sensing and remote control, a costas loop with FLL (frequency-locked loop) is introduced in this paper. The principle and structure of PLL (phase-locked loop), including FLL and Loop filter, are analyzed and described. The module of carrier synchronization in the all-digit DS-QPSK receiver was carried out in the FPGA chip. The problem about the estimation and track of the correlative carrier frequency under high dynamic circumstances was resolved very well.Several carrier frequency estimation algorithms including EKF and RLS with opened loop are analyzed, which aim to settle the carrier phase estimation problem preferably under high dynamic circumstances. An improved phase and frequency esti-mation algorithm is proposed in the paper. Simulation results show that the algorithm is faster and more precision than other algorithms.