Research And FPGA Implementation On Transmitter For MIMO-SCFDE Systems In Low SNR Environments

In broad band wireless access system,Inter Symbol Interference(ISI)caused by frequency selective fading transmission affect the performance of the communication system serious.Single-carrier frequency domain equalization(SC-FDE)system can combat IS I effectively without employing coding technology.Multiple-input-multiple-output(MIMO)technology can improve the system performance without increasing the transmission power and transmission bandwidth.So combing MIMO technology with SC-FDE technology to make the multiple antenna block transmission systems has been the research hotpot for higher transmission rate and quality.The paper studies the basics of MIMO-SCFDE communication systems,analyzes technical involved in transmitter,determines the design method of the key module in transmitters.The transmitting end includes Turbo coding,BPSK mapping,repeat,space-time block codes(STBC),framing,molding filtering,frequency modulation and other modules.We discuss the main principles and implementation of these modules respectively.We select space-time coding techniques in order to obtain diversity gain and enhance immunity fading channel.In order to reduce transmitter power,increase the SNR,MIMO output signal evacuation DAC module after oversampling and filtering to complete frequency modulation.Combined with ultra-low SNR environment designed to 640ms of data frame structure and designed an inter-symbol guard interval.Based on the ultra-low SNR environment simulation,issues design and implementation from channel coding to RF by using Verilog HDL language in ISE integrated development environment,includes Turbo coding,BPSK mapping,repeat,STBC,framing,molding filtering,frequency modulation and other modules.Achieving a system of base band transmitter in a Virtex-6 FPGA chip for saving system resources.The transmitter in this thesis have verified its correctness through the laboratory and field testing of the practical communication system.