Signal Detection Algorithm And Implementation Of Broadband MIMO-SCFDE Communication System

With the rapid development of the UAV (Unmanned Aerial Vehicle) industry in China, the demands are greatly improving. In the UAV system, the communication data link is responsible for the fast and reliable transmission of information between the ground station and the UAV. A single antenna system is used in most of the applications, together with the some of smart antenna system of SIMO (Single-Input Multiple-Output). However, under the demands of the limited power consumption and cost, increasing the communication distance, communication bandwidth, more complex communication environment, data link has become a key factor restricting the development of UAV. So it is very important to study the communication data link of UAV, and give the specific hardware implementation structure.Firstly, this thesis analyzes the existing problems of the current data link of UAV, and a novel design of hardware architecture is presented. Based on the analysis of SCFDE (Single Carrier Frequency Domain Equalization) system and MIMO (Multiple-Input Multiple-Output) technology, this thesis studies the signal detection algorithm of MIMO-SCFDE system and implementation of FPGA (Field-Programmable Gate Array). According to the complexity and performance requirements, the communication system with the combination of space-time block coding(STBC) and single carrier frequency domain equalization(SCFDE) technology is appliedNext, the frame synchronization detection algorithm is introduced. The traditional algorithm is low precision and the hardware implementation complexity is high. In order to solve this problem, this thesis designs an improved frame synchronization detection algorithm. Firstly, on the basis of theoretical analysis and mathematical derivation, the matlab simulation model and the results are given. This Algorithm can get better synchronization performance under the conditions of large multipath delay and low SNR. Subsequently, the fixed-point algorithm is simulated and tested under the matlab, and corresponding FPGA implementation is given, including the interpolation filter module, the extraction module, frame arrival detection module, time coarse synchronization module, time fine synchronization module.Next, we focus on the signal detection algorithm of MIMO and SCFDE. Firstly, the coding and decoding principle of STBC and how to estimate the parameters of the channel are described by using the training sequence. In order to combine the MIMO technology with SCFDE technology more effectively, the STBC decoding is performed in the frequency domain according to block modulation and discrete FFT transform. IFFT is omitted, and it can be directly applied to the channel equalization. Subsequently, the matlab simulation model is established, and simulation results and the rationality of the analysis and verification algorithm are given. According to the flow of the algorithm, the hardware structure of FPGA is designed, including the cyclic prefix removing module, the channel frequency response estimation module, the STBC decoding module, the single carrier frequency domain equalization module, etc. Each module code and test texts are written by Verilog hardware description language. The modelsim, Debussy and other simulation tools are used to verify the correctness of the code. Then the results of matlab simulation and RTL simulation results are compared, and Maximum likelihood decoding of RTL results using matlab is carried out used to verify the correctness.