Research And Implemention Of Infiniband Host Channel Adapter User Interface

With the growing demand for high capacity,multi-service,low cost and low energy consumption in mobile communication,the traditional radio access network will no longer meet the future demand of radio access.China Mobile Research Institute proposed a new radio access network architecture C-RAN in 2009.C-RAN architecture with centralized,collaborative,wireless cloud and green features,can effectively enhance the wireless access capabilities.C-RAN consists of clusters of baseband units(BBU)and distributed remote radio units(RRU).The BBUs and RRUs are connected through the fronthaul interface.Howerver,high bandwidth and real-time data communication demand poses a growing challenge to the fronthaul interface in the current C-RAN.In order to meet the future 5G radio access needs,the relevant industry proposed the concept NGFI(Next Generation Fronthaul Interface)in its purpose of developing high performance fronthaul interface.InfiniBand(referred to as IB)network with high bandwidth,low latency and high reliability and other characteristics,is a high-performance interconnect technology and IB is suitable as a fronthaul interface.This thesis designs a fronthaul interface based on IB,which consists of HCA and FPGA.HCA(Host Channel Adapter)is the end device of IB,and FPGA implements control logic.The main contents of this thesis include:(1)InfiniBand related technical background.Studies the details of the InfiniBand interconnect technology,protocol hierarchy and its components.Analyses the queue communication of InfiniBand which based on VIA architecture,IB operation and several transmission modes.(2)The overall design of the IB interface controller.The IB interface controller implements completely processor offload of IB transfer.IB inteface employs HCA and FPGA.The FPGA implements the HCA control logic,its on chip logic adopts AXI4 bus interconnection and it completes IB operation through driving HCA.In addition,this thesis also designs a specific PCIe adapter card for HCA and FPGA board.(3)Implementation and simulation of IB interface control logic.Introduces FPGA logic design of IB interface controller,ncluding submodule of HCA controller,high speed bus mapping module,SDP submodule,DDR3 memory inteface module.The results of functional simulation and timing analysis show that the interface controller based on FPGA achieves the expected design,and its clock frequency can reach 250 MHz,which satisfies the high speed design requirement of the utilization.