Design Of Silicon-based RF Switch Intergrated Circuit

With the rapid development of the wireless communications market,the demand of low-cost and highly integrated RF transceiver is increasing.In order to meet this trend,complementary metal oxide semiconductor(CMOS)has caught massive attention due to its superior characteristics.However,in achieving the goal of fully integrated transceiver,CMOS process encountered bottlenecks because of its own defects,it is difficult to integrate high-power devices,such as switches and power amplifiers.Based on this,this paper uses silicon-based SOI process to design a high-power single-pole five-throw switch which is of great importance to the realization of fully integrated transceiver.Firstly,this paper introduces the RF switch technology with CMOS process.The physical limitations of the current CMOS triple-well process in designing the switch circuit is analyzed,and the silicon-based SOI process is added as a contrast to illustrate the advantages of SOI process in RF switch design.Secondly,by analyzing the power capabiligy bottleneck of the serial-parallel silicon based switch,the negative voltage bias is used to turn off the transistor to improve the linearity of switch.The negative voltage module is intergrated in the SOI switch chip,and it consists of three parts: oscillator,clock buffer and negative voltage charge pump.The oscillator part of this work is using the multibravator to replace the ring oscillator,which is adopted in the classical negative voltage module.Comparing to the ring oscillator,the multibravator has smaller size and better stability performance in the low frequency and low process node applications.Then,the equivalent lumped model “on” and “off” states for transistor is established according to the switch transistor provided by the SOI process library,and the extraction method of each parasitic components is proposed.The accuracy of the equivalent model and the correctness of the parameter extraction method are verified by comparing Sparameters simulation between equivalent model and PDK transistor.The establishment of the equivalent circuit model is of great significance to the selection of the switch transistor size.Finally,design the switch circuit based on the equivalent model,and tape out to measurement.The SOI switch chip area is 1.6×1.6 mm2.In the frequency range of 0.7 ~ 2 GHz,the test insertion loss is less than 1.1 dB,the test isolation is greater than 27.5 dB,the test port return loss is greater than 17 dB,and the simulation input P1 dB compression point is greater than 33 dBm(by the limit of output power of the vector network analyzer,the measured P1 d B is greater than 16 dBm).The switch measurement result and simulation result is close to the targets which verified the feasibiligy of realizing high power devices in silicon-based materials.