Design And Implementation Of RF Front End Of Zero If Transceiver Based On FMC

With the popularization of 4G,the development of 5G wireless communication technology is changing with each passing day.Wireless communication is developing towards the trend of low cost,miniaturization,low power consumption,portability and reconfiguration.Spectrum shifting is the core of wireless communication technology.Due to the need of multi spectral shift,the traditional super heterodyne frequency conversion structure makes the wireless communication equipment have large volume,high power consumption and high cost.It is difficult to adapt to the development trend of wireless communication.In recent years,as an emerging technology,software radio has revolutionized the traditional radio technology field.With the development of software radio,zero if frequency conversion structure has become very practical value.The RF front-end hardware based on the zero if architecture is widely used by amateurs,academic institutions and commercial organizations to research and construct wireless communication systems.However,due to the existence of mirror interference and local oscillator leakage,there are still few traces of zero intermediate frequency in basic wireless communication facilities.For this reason,this paper studies the RF front-end technology of zero if transceiver,Specifically include:First,in view of the miniaturization,portability and reconfiguration of wireless communication equipment,a zero if single transmitter single receiver RF front-end equipment based on standard FMC single width board is designed.The zero if RF front-end equipment covers the 400MHz~4GHz band,the maximum real-time operating bandwidth 160 MHz.Second,in order to solve the problem of the image interference and the leakage of the local oscillator,a IQ balanced digital domain compensation algorithm is designed.The algorithm is based on FPGA programming language,high efficiency,strong real-time.The results show that the proposed algorithm can improve the image rejectionindex to-50 dBc,The local oscillator leakage indicators were improved to-40 dBm.Third,combination baseband device based on FPGA and compatible with FMC standard connector,FMC zero intermediate frequency transceiver RF front-end project verification is completed.Baseband equipment using FPGA as the main device,The design of the IQ balance processing algorithm and transceiver front-end verification,the test results show that the design requirements to meet the target.The work of this thesis is to provide theoretical and methodological support for the RF front-end technology based on FMC,and the research results have been verified by engineering,it has theoretical value,practical value and reference significance.