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The Circuit Design For The Time-triggered Fault-tolerance Ethernet Switch

Posted on:2018-01-26Degree:MasterType:Thesis
Country:ChinaCandidate:Q GuoFull Text:PDF
GTID:2348330512495317Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the development of communication technology,Ethernet is widely used in the field of aviation and industrial control.The Time-Triggered Fault-Tolerance Ethernet combines the deterministic,fault tolerance and real-time performance of time triggered technology with the flexibility,dynamic performance and "best effort" of the traditional Ethernet,and provides support for synchronous,highly reliable embedded network systems.In this thesis,the communication algorithm of Time-Triggered Fault-Tolerance Ethernet is studied,and the switch circuit design and function simulation are completed.The main contents are as follows:(1)The protocol architecture of Time-Triggered Fault-Tolerance Ethernet is studied.The Time-Triggered Fault-Tolerance Ethernet is based on the standard industrial Ethernet 802.3 protocol and adds the time synchronization system.Time-Triggered Fault-Tolerance Ethernet can perform time triggered service,traditional Ethernet service and time synchronous algorithm.(2)The synchronization algorithm of Time-Triggered Fault-Tolerance Ethernet is studied.Time-Triggered Fault-Tolerance Ethernet completes the time synchronization algorithm by time information in the protocol control frame.Time synchronization algorithm include timing preserving algorithm,compression algorithm and clock correction algorithm.(3)This paper presents an improved scheme for the existing measurement methods of transparent clock.Existing measurement methods only measure the link delay of packets.In this paper,a timestamp method is used to measure the time when the packet is processed by the switch.(4)Circuit design and Simulation of Time-Triggered Fault-Tolerance Ethernet switch are completed.According to the transmission service of Time-Triggered Fault-Tolerance Ethernet,the switch is designed into three modules.This paper uses Verilog to realize the function of the switch,and simulate the waveform through ModelSim software.By analyzing the waveform,this paper draws the following conclusions:The switch corrects the local clock by completing the time synchronization algorithm,and guarantees the time triggered service without error sending.
Keywords/Search Tags:Ethernet, switch, circuit, algorithm, simulate, synchronization, modules
PDF Full Text Request
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