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Research And Application Of Clock Synchronization Over Ethernet Packet Networks

Posted on:2009-11-24Degree:DoctorType:Dissertation
Country:ChinaCandidate:J ChenFull Text:PDF
GTID:1118360245499245Subject:Communication and Information System
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Ethernet is one of the most prevalent networks used in the world.As an effective solution for bearing IP,Ethernet has been treated as the mainstream Technology for information infrastructure from the tabletop work environment to the enterprise networking,campus networking and the metropolitan area network, Except the none real time data packet,a lot of real time service,such as Circuit Emulation Service over IP,stream media and real time measurement and Control data,are expecting to be deployed by the economical Ethernet.As its original design purpose,Ethernet is not a media for real time transmission,but once it evolved to the next generation networks,the service clock synchronization should be considered and well defined in the Ethernet,so that some constant bit rate service and time sensitive application could be guaranteed without any quality degradation.Theories and experiments about the clock synchronization over Ethernet packet network have been studied in this thesis,from the range of IP layer over Ethernet, MAC layer of the Wireless local network to the PHY layer in Ethernet,methods of the clock recovery for CBR service and transmission of synchronous signal over Ethernet have been investigated,as a result,various methods of clock synchronization for some application scenario have been proposed,the application research for CES over EPON is also presented.The contents and contributions of the thesis are as follows:The one-way adaptive source clock recovery based on IP network is discussed firstly.After the investigation of the feature of IPDV for CBR service transmitted over IP,a new method for clock recovery based on double moving average and PI controller is proposed,this method has some merits of controllable residual jitter power and relative fast response time.Apply Queuing theory to the analysis of IPDV of CBR packet in a single switcher cases,the distribution characteristic of IPDV which is easily influenced by the background traffic is obtained.Finally,a formula about the power of the output noise with respect to input samples with weak autocorrelation has been derived by using of Parsavel's relation and discrete z transform,by simplify the response time formula,a low bond expression of response time has also been achieved.The second part focuses on out-band synchronization method based on Inter-Packet Gap(IPG) of Ethernet running in full-duplex mode.Starting from the discussion of data transmission mechanism via IPG and its data frame structure,a Synchronous Residual Time Stamp(SRTS) based clock synchronization method is introduced,the characteristic of new clock synchronization method based on SRTS over IPG is fluctuating immunity for In-band Ethernet Traffic.The parameters of SRTS algorithm used in Ethernet IPG and the output jitter waveform are determined by using continued fraction.Simulation results and FPGA hardware implementation are given to demonstrate the high quality of recovered clock.The third part studies the application of Circuit Emulation Service(CES) over Ethernet Passive Optical Network(EPON).Features of MAC and PHY in EPON are introduced firstly,and then the conception of CES including its data packaging and clock recovery is explained.Finally,a clock recovery method of TDM over EPON based on frequency ratio is proposed,by use of this clock method,a multiple E1 TDM which has its own clock independently could be transmitted between IWF of OLT and ONU.Furthermore,there is no special requirement on the counting frequency signals, any oscillator with frequency independent could be used in the hardware of IWF and this gives a convenience for implementation.A solution of clock transmission for TDM over EPON is also introduced in the partSince industrial control signal must meet the hard restrict time requirement,the last chapter addresses synchronization in wireless local networks(WLAN) which is used as transmission media in industrial field.Some conceptions about WLAN's MAC,clock model and software clock are briefly explained firstly,based on this conception a continuous synchronous clock algorithm is porposed,the time stamp in beacon frame of WLAN's MAC is treated as a common timing clock in the field,and all devices which should be synchronized will accommodate their own clock to the time stamps issued by an AP in WLAN.A theoretical analysis and NS2 simulation of the proposed algorithm in the case of beacon packet loss and delay occurred is given in this part.As a result,the proposed algorithm of clock synchronization can meet the timing requirement of low data rate industrial signal.
Keywords/Search Tags:Ethernet, IP Packet Network, Ethernet Passive Optical Network (EPON), Wireless Local Network (WLAN), Clock Synchronization, Source Clock Recovery, Continuous Clock Synchronization, Circuit Emulation Service (CES), Inter-Packet Gap (IPG)
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