Research On Multi-FPGA-Based Hardware-in-the-Loop Simulation System For Power Electronics

Control of complex power electronic systems usually rely on hardware-in-the-loop simulation to accelerate its development. In view of the current commercial hardware-in-the-loop systems, it was monopolized by foreign companies and has a lot of drawbacks, such as high cost, poor openness, limited capacity and IO ports. And there is little positivity research aimed at this type of hardware-in-the-loop simulation system in China. Therefore, this paper was given a study on real-time simulation in the field of power electronics.This paper firstly studies the operating principle of hardware-in-the-loop simulation system and gives a comparasion to the common architecture about hardware-in-the-loop simulation system. Combining their advantages, this paper proposes a hardware-in-the-loop simulation system based on multi-FPGA architecture, and divides the system into several independent function boards. It uses multi-FPGAs as the core parallel computing unit, which effectively enlarges the simulation computing ability and shortens the simulation step.The key points of hardware-in-the-loop simulation system are analyzed. This paper introduces computing capability of different power electronic systems, and then chooses a proper multi-FPGA topology. The communication architecture between function cards are designed and requirements of data transmission rate are analyzed. An enhanced SPI communication between main computing board and IO board is proposed. Using LVDS communication implement data exchange between main FPGA computing boards.Based on the above analysis, a multi-FPGA based hardware-in-the-loop simulation system for power electronics is developed in this paper. The design process is detailed and the simulation capacity is estimated. At last, 10 kV 12 cascaded and 380 V 5 cascaded H-bridge STATCOM model were built respectively. Both the model and platform are validated under the real control unit. These closed-loop experiment results show that real-time simulation step can reach 2us and the simulation error between hardware-in-the-loop simulation system and Matlab/Simulink is within 0.5%.