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Cluster-on-Chip Architecture's Verification Technology

Posted on:2016-04-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z W WangFull Text:PDF
GTID:2348330509460816Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Multicore architecture has been a hot spot of processor architecture researching. The increasing number of on-chip cores and richer core types bring many challenges to the study of the multicore architecture. For this reason, the processor architecture researchers have brought the concept of high-performance cluster learn to on-chip multicore architecture, and proposed cluster on-chip architecture. The advantages of hardware verification show an alternative way to researchers. The flexibility and performance of FPGA verification platform make it efficient when the multicore processor is simulated. FPGA verification platform has become the ideal simulation and verification platform of multicore architecture research. The building of Prototype Verification System need to hardware verification platform design, logic design and benchmark running, and each level has a lot of research work.In the part of logic design, based on the current mainstream chip interconnect technology, we designed and implemented network on chip for cluster on chip architecture. We implemented wormhole routing, virtual channels, XY dimension order routing algorithm in the network on chip, with these technical, the network can avoid deadlock. The network on chip design is flexible, scalable and reusable. It has the ability to support data communication between cluster on-chip nodes.In the part of hardware verification platform, we design and implement multi-FPGA prototyping verification platform for cluster on chip architecture. Our design meets the logic unit capacity requirements of the prototype system and simplifies the peripheral design. According to the needs of the prototype system of the cluster on chip architecture, we selected FPGA chip and did analyzing, design and implementation on the power distribution subsystem, clock distribution subsystem, configuration debugging subsystem, and I / O subsystems of the verification platform prototype circuit board respectively. Then the PCB design was planned to meet verification requirements of the prototype board. The testing result shows that the prototype circuit board and its chips and peripherals can work stably.
Keywords/Search Tags:multi-core, cluster on chip, prototype verification platform, NOC
PDF Full Text Request
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