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Research On Reliability Of Through Silicon Via(TSV) In 3D Integration

Posted on:2017-09-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhouFull Text:PDF
GTID:2348330509460076Subject:New Energy Science and Engineering
Abstract/Summary:PDF Full Text Request
As a new generation of packaging technology, three-dimensional(3D) chips integration makes microelectronics packaging present advantages of high transmission speed, high density and small size, promoting rapid development of packaging industry. Through-silicon-via(TSV) is a key technology to realize 3D integration. Reliability of TSV directly affects the reliability of whole 3D packaging products. In this thesis, based on the finite element numerical simulation, finite element models are established with Hyper Mesh and ABAQUS. Thermo-mechanical reliability of stacked-die 3D package and TSV are studied. A series of studies is implemented, which includes the following contents:Based on the combination of fracture mechanics and FEM, the interfacial delamination of TSV is analyzed and interfacial cracks are investigated. Damage model is established to simulate crack initiation and propagation of copper/silica interface under temperature load. Propagation of buried cracks and incisive cracks at four typical positions is analyzed. The driving force that promotes the propagation is studied. When the crack length is above 2 ?m, the normal stress with open crack mode will play an important role.Thermo-mechanical reliability of stacked-dies 3D package is investigated. Finite element numerical simulations are applied to calculate the stresses of micro solders, normal solders and TSVs in different locations. Then the most dangerous place of each structure is determined. The effects of structure parameters on the lifetime of solders and copper layer are investigated. It is demonstrated that 2D model is feasible for the stress strain response analysis of 3D package. A new TSV structure is introduced in this article. The thermo-mechanical reliability comparison between the new structure and the traditional copper-filled structure is made to indicate the higher reliability of the new structure. The combination of Design of Experiment(Do E) and the finite element simulation method is adopted to study the effects of structure parameters on the reliability of TSV. The structure parameters are optimized to improve the reliability.
Keywords/Search Tags:Reliability, 3D Integration, Structural Optimization, Interfacial Delamination, Through-Silicon-Vias(TSV)
PDF Full Text Request
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