FPGA Based Convolutional Neural Network Application Research

Convolutional neural network(CNN) is a state of the art computer vision algorithm. Based on the traditional artificial neural network, CNN reduced the amount of parameters by sharing the weights of the neurons. Besides, the CNN takes the images as its input data directly and conducts a process of feature extraction, classification and recognition. In the field of computer vision, CNN achieves relatively high recognition rate, and it overcomes displace and distortion of the target image. While, there is a trend that the realization of CNN requires more and more parallel architecture, for it is a computing intensive algorithm, especially huge numbers of repeated and independent multiplication and addition.Nowadays, most of the deep CNN are running on platforms consisted of several GPUs, so that the parallel acceleration can be obtained. However, this kind of platforms is large and power consuming, which makes it difficult for CNN to be applied in situations like small and low power platforms. Because of the serial architecture of the general purpose CPUs and embedded CPUs, they cannot implement CNNs efficiently. On the other hand, dedicated DSP chips are hardly qualified for intensive computations in CNNs. CNNs implemented on small and low power platforms are rarely reported and worth working on.Hardware resources and their structure in Field Programmable Gate Array(FPGA) meets the requirements of CNN massive repeated and independent computation, thus the CNN can take great advantage of FPGA parallel architecture. So the CNN can be implemented on small and low power platforms. Based on theory above, this paper makes contributions as follows:1) This paper designs the CNN basic computation units on FPGA. And a computation level 'from a feature map to a feature map' is abstracted.2) The designed FPGA modules which achieve convoluting, nonlinear function and pooling will fit the computations of many different layers in CNN without much modification. As a result, FPGA based CNN system has the best tread off between speed and hardware resources.FPGA based CNN using modules on computation level 'from a feature map to a feature map' is flexible and has low power consumption. Register Transfer Level(RTL) net list shows the power of a single basic module is 1.05 W and a shallow CNN system power is less than 1.6W. So the FPGA based CNN designed in this paper is fully operational and can be applied to small and low power platforms, achieving the tasks of recognition or human computer interaction.