Research On And Design Of SiGe HBT Microwave Ultra-Wideband Low Noise Amplifier

Because of its high data-rate transmission capability and other advantages, ultra-wideband wireless communication system shows its broad prospects in the areas of satellite communications, vehicular communications, and other short-distance communications(such as Wireless Local Area Network and Wireless Personal Area Network). As the first active stage of the RF receiver, ultra-wideband low noise amplifier(UWB LNA) has to amplify RF signal without attaching too much its own noise over wide-band, but also achieve good input impedance match,high gain and gain flatness and linearity, which present significant challenges for UWB LNA design. Si Ge technology has been increasing used in high performance circuits because of its high cut-off frequency, low noise characteristics, as well as its compatibility with the highly integrated CMOS process. The research on and design of UWB LNA are based on the 0.18 ?m, 200 GHz fT Jazz Semiconductor SBC-18 Si Ge HBT Bi CMOS process technology.This paper introduces the theory of low noise amplifier, including basic knowledge of noise source and noise model, the representation of noise in circuit, as well as Smith chart and scattering parameter, the gap between RF circuit designers and microwave engineers. The author also studied the ultra-wide band LNA topologies to realize broadband gain, broadband matching through consulting a large number of literature researches.To achieve high gain and wideband operation, the writer finally chose a two-stage LNA. The first stage consists of common-emitter transistors to realize gain of low frequency and a fourth-order band-pass filter to realize wideband impedance matching. The second stage uses a inductor to introduce a zero to obtain high-frequency gain and to expand the bandwidth and gain flatness. The influence of the base bias circuit on LNA linearity was also researched. Both theoretical analysis and circuit simulation indicate that inductor bias feed can effectively improve the LNA linearity. Taking into account the LNA testability, the author also studied output matching circuit, the electrostatic protection circuit. Theoretical analysis of gain, noise, matching and linearity characteristics were carried out, and cadence spectre tool was used for LNA optimization. Finally, this paper presents the design and optimization methods of RF circuit layout. The author lay out the LNA, complete DRC, LVS etc., and extract the parasitic parameters using virtuoso, and finally use calibre simulation tools for layout validation.To save chip area, resistor bias feed was used. After repeated optimization of layout and schematic of the LNA, and using calibre simulation tools for layout validation, good simulation results were obtained: 5.5GHz-19 GHz band, the gain of 21.3d B <S21 <23.4d B, noise figure NF <4d B, the input matching S11 <-10 d B, output matching S22 <-13 d B, input 1d B compression point P1 d B=-28.7d Bm@12GHz, reverse gain S12 <-53 d B. Simulation results show that although this LNA has poor linearity but has only 20 m W power consumption, high gain, low noise, good input and output matching, etc., achieving the design goals.