Research On SiGe HBT Low Noise Amplifier

As the compromise process between cost and performance of CMOS and Ga As technology, Si Ge HBT process has a very good application prospect. This process can bring lots of radio frequency communication circuits into realization based on radio frequency application and high-performance devices, and the low noise amplifier is the most representative. Working as the core circuit of the receiver, LNA should make lots of compromise between gain, match, noise figure and linearity. The performance of LNA determines the overall performance of the receiver. And the circuit is more difficult to develop for the current hot research of Ku, X band receiver and higher frequency microwave circuit.In this paper, the model of HBT Si Ge transistor and LNA circuit have been studied, and the main innovations are:The technology characteristics of HBT Si Ge and bipolar small-signal model are analyzed, and the main noise sources of Si Ge Hicum device are proposed. Based on the basis of noise knowledge, the dual port network in circuit noise application is analyzed, the optimization method of the circuit level network is put forward. Based on Si Ge HBT technology, Si Ge small-signal model in proposed using transistor s small-signal model, and Si Ge transistor noise model is proposed combining physical model. Based on the analysis of the dual port network analysis theory of multi-port network analysis is proposed, which can be used in the analysis in circuit level, other than the single transistor analysis. This will result in a solid theoretical guidance for the design of low noise amplifierSome important parameters of Si Ge low noise amplifier are analyzed, which are input match, gain flatness and linearity. A four order filter on-chip matching network is designed and compromise between input match and noise is optimized. The problem of matching and network noise is analyzed in gain flatness and a fourth order 6~14GHz low noise amplifier is designed by using the on-chip inductance compensation and zero pole method, whose gain only has 0.4d B variation. By using gain allocating scheme individual stage’s gain is optimized, which avoids gain overshooting in one single stage as well as linearity deterioration. Shunt-shunt negative feedback is used in input port to assure input match, and inductor is adopted in the third stage to form a zero to compensate the gain rolling off caused by pole. Local negative feedback and global negative feedback are utilized to fulfill the noise flatness and gain flatness, as well as enlarging the frequency band. Aiming at the problem that the linearity of the Si Ge device is poor, the circuit level linear optimization method is proposed according to the weak nonlinear model of the transistor. Associated with the adoption of Volterra Series, linearity of single stage Si Ge is optimized, and the corresponding linearity contributions of parameters are quantized. The LNA leads to a better bipolar LNA whose IIP3 is-7.7d Bm in ultra-wide band.UWB band and X, Ku band of ultra-wideband Si Ge low noise amplifier is designed. The LNA of UWB is studied, and the method of noise flattening based on the optimization method of quality factor is proposed. And for X and Ku band, the circuit design of low noise amplifier is more focused on the complete design process. Input match, gain, linearity and noise are analyzed and optimized, and the common problems and optimization method of RF layout are presented. On the basis of circuit design and optimization, this paper puts forward the test method at high frequency, the process of the test method of the RF circuit and the results are analyzed, especially on the S-parameter measurement, noise measurement and linearity measurement. This LNA can achieve the gain of 16 d B and the noise figure of 4d B, while the 1d B compression point is also realized by-18 dBm.For the image rejection receiver, two structures are designed for the Si Ge image-rejection low noise amplifier with different frequency bands. K band low noise amplifier uses the passive filter structure to achieve a 33.6d B of image rejection ratio and the gain of 19 d B. The second low noise amplifier is achieved through on-chip active image-rejection filter to achieve the 33 d B of image rejection ratio, which has a good practical and theoretical guidance.In this paper, the design flow and design method of HBT Si Ge low noise amplifier are described in detail, and the circuit design is described in detail through various examples. Examples are introduced and analyzed in gain, matching, linearity and noise, which provides an important theoretical guidance and design ideas for LNA circuit design.