Design And Implementation Of Multi-Channel Data Acquisition Based On RF Sampling

Few in amount of analog devices, low in power, flexible in use and high in performance, the RF Sampling is widely applied in the design of radar receiver. With the rapid development of VLSI, digitization, smaller volume and higher performance become the tendency in the radar system design. Aiming at the requirement of high-performance and real-time processing in modern radar signal, the researches on multi-channel RF sampling and high-speed serial communication are proposed in this dissertation. The main research results are as follows:1. The sampling methods and performance of radar receiver are studied. Three different methods for signal sampling, which are used commonly in engineering, are introduced. Based on the high frequency and narrow bandwidth of RF signal, the bandpass sampling theorem is applied to determine the sampling rate. This paper elaborates on the relationship between the SNR gain, dynamic range and receiver sensitivity. According to project requirements of radar receiver, the main devices are selected to design the circuit.2. The algorithm for digital down converter based on RF sampling is studied. Depending on the conditions of project, four different structure of DDC are given, and the pros and cons and applicable conditions are listed. Two levels of DDC algorithm is presented based on RF sampling. The frequency deviation due to the lack of NCO-bit is solved, and the anti-alias filter is designed emphatically. Two common methods for testing dynamic range are provided, and this paper gets the the dynamic range of AD chip, which meets the requirement of the receiver sensitivity, and AD board based on real data. Moreover, the testing method for out-band rejection of anti-aliasing filter is given. This paper analyzes the notch of filter and the ability of rejection on out-band signal.3. The jamming algorithm in radar receiver is studied. In order to improve the performance of anti-jamming in radar, this paper puts forward two methods for anti-interference: adaptive frequency agility and narrow pulse eliminating. The hardware implementation based on FPGA is given according to the application conditions and the principle of the two anti-jamming methods. Combined with the real data and the effect of terminal observation, the interference effect is better.4. The high-speed serial communication based on GTX is studied. For the problem of high data transfer rate of high performance on AD chip, the development scheme is given based on FPGA through the detailed analyses of the contents of the high-speed transmission protocol JESD204 B. Finally, a kind of flexible and efficient custom transport protocol based on GTX is introduced, which is mainly used in fiber communication between boards, and the main testing tool in GTX, IBERT, is also introduced.5. The standardization of FPGA design is studied. The design flow of radar signal process based on FPGA is summarized, and the FPGA development process is introduced emphatically. Then, this paper puts forward a self-testing method based on FPGA, and introduces the details, which is used in the project. Finally, the FPGA timing design and optimization method are introduced, and the paper makes detail on the process of asynchronous clock domains in this paper, especially.