Fpga-based Radar Digital If Receiver Technology Research And Realization

Since has been put forward in 1992, in recent years Software Radio made remarkable progress, arose general attention and strong interest. The important conception of Software Radio is to make A/D converter as close to RF antenna as possible. However, limited by the current device development level, it is difficult to realize RF signal digitalization. Thus, the prevalent choice is to make analog IF signal digitalized, convert it to baseband by using digital down converter, then accomplish digital signal processing in baseband. This kind of receiver is called IF digitalized receiver, which has become one of the most important parts of modern radar and communication system. Therefore, it is highly significant to research the IF digitalized receiver. In this paper, IF sample and digital down converter are researched. At first, analog receiver is contrasted to digital receiver, and the feasibility and necessity of IF technology in radar signal processing are illuminated. Secondly, the basic theoretics in IF signal processing, such as sample theory, quartered demodulating technology, filtering and draw-off theory are discussed. Then the problems of system arithmetic, sample rate, and so on, are particularly introduced so the system scheme which was verified can be put forward. Based on these elements, the material design of IF sample and digital down converter based on FPGA is specified. Next, the nuclear chip of IF sample processing is AD6644, whose detailed circuit is introduced. Based on FPGA, the design of digital down converter is quite flexible. The mixer and realization of NCO are introduced. As a new instrument , how to use DspBuilder to contrive a filter is discussed in detail. At last, the whole system is tested, and the test result indicate that the system could work well and the desired requirements could be achieved.