Design And Verification Of SDRAM Controller Based On On-chip Standard Bus

Recent years, with the rapid development of IC industry, the processor performance is improved greatly in the digital system. Therefore, the memory performance has more and more impact on the overall performance of the system. The higher requirements about the data bandwidth and memory capacity are proposed. SDRAM is known as the synchronous dynamic random access memory. As an important part of memory, SDRAM has been widely employed in the field of electronics including computer because of its peculiar characters such as large capacity, low cost and fast transmission speed.The SDRAM controller is the control unit of SDRAM memory chip. It is utilized to translate data and instructions from the processor into read and write operations. The SDRAM controller is divided into the PLB slave interface module, DCR interface module, clock domain crossing module and SDRAM control module. SDRAM control module consists of the register SDRAM module, bus arbitration module, address control module, automatically refresh module, data control module, state machine module and page control module. The Verilog hardware description language is utilized to implement logic function of each module. According to the functional verification points, verification platform is built and testcases are prepared to do the module level verification. Four physical Banks are supported by SDRAM controller and each physical bank space up to 256 M. The different types of read and write operation is supported by the SDRAM controller. Configurable ECC and parity is supported. The correctness of the data is ensured and resource is saved. Page-open mode is supported and LRU page replacement algorithm is utilized. In addition, clock domain crossing transmission between the external bus clock and the internal SDRAM clock is supported to increase the reusability. The frequency range of SDRAM about internal clock is 66MHz-133 MHz, and the frequency about external clock of the PLB bus can be up to 200 MHz.