A Study Of Silicon Based GaN Materials And Devices With Stress Modulation

Recent years, an increasing number of attentions have been paid to silicon based GaN materials and electronic devices due to their unique advantages. On one hand, these advantages originate from the substrate of silicon. Silicon costs very low as a substrate and has a good thermal conductivity. In addition, the process of silicon based GaN materials and electronic devices can be compatible with the conventional CMOS process under some conditions. Based on these superiorities, Si based materials have always been promising for researchers. On the other hand, good properties which are denoted as wide band-gap, high breakdown electric field, good thermal conductivity and the strong radiation-proof ability make GaN the ideal candidates as electronic devices and photoelectronic devices with ability of high power, high frequency, high temperature resistance, high pressure resistance and the radiation-proof. However, silicon based GaN materials always have cracks after MOCVD growth which is due to a very strong stress in the growth process, and this can be attributed to the large lattice mismatch and thermal mismatch between GaN and the Si substrate. In this paper, we designed the growth structure of material which is aimed at the stress issue, and then, we studied the influence of stress on the performance of devices with application of external mechanical stress on the conventional Si based HEMTs. The specific work and conclusions are as follows:1. We designed the growth structure of Si based GaN material with focusing on the crack issue due to the stress. Firstly, we characterized the surface morphology and crystal quality of samples grown by conventional procedure. We found that the nucleating layer of AlN and AlGaN buffer layer have a large influence on the quality of material. Thus, we applied the optimized "three steps" method which was used for sapphire substrate to design the growth structure which can be expressed as HT-AlN+LT-AlN+HT-AlN. In order to minimize the lattice mismatch issue in growth, we designed a double AlGaN buffer layer with two different Al ration which can be denoted as a two-step growth method with a high Al ration (Al0.5Ga0.5N) and a low Al ration (Al0.25Ga0.75N). A comparative analysis of the Si based GaN heterojunction show that the surfaces of samples with new method have no cracks which means the stress from lattice mismatch is effectively released. Besides, the screw dislocations reduces an order and two orders of edge dislocations when comparing with materials of conventional methods. With TEM, we found the dislocations mainly annihilate at AlGaN buffer layers with graded Al ration. This means the new buffer layers can effectively reduce the number of dislocations of Si based GaN material.2. We taped out the new-designed Si based GaN heterojunction materials and characterized the MIS-HEMT devices. We mainly characterized the characteristics of ohmic contact, output, transfer and the MIS gate capacitance. We also calculated the interface states density and trap density with the C-V results.3. With application of different mechanical stress on the devices by a controllable stress platform, we measured devices properties under different pressures. Firstly, with the Raman spectrum, we found the peak of GaN has a red shift when increasing the external stress. This means the GaN layer suffers a larger tensile stress. Then, based on comparison of device characteristics under different stress, we found the saturation drain current is raising with increasing the external stress. Also, the sheet density of the carriers increases at the same time. The number of interface trap density is halved, while the number of interface states density stays always the same. It can be inferred from the contrasting results that due to the little variation of the number of interface states, the enhancement of 2DEG is mainly from the external stress. The raising of external stress leads red shift of peak in the Raman spectrum, then the sheet density of carriers increases which boosts the saturation drain current.