Self-Heating Stress Induced Degradation Of A-IGZO TFTs And Modeling Of Drain Offset A-IGZO TFTs

Amorphous indium-gallium-zinc oxide(a-IGZO)thin film transistors(TFTs)have attracted more and more attention due to their high mobility,low sub-threshold swing(SS),low processing temperature and good uniformity,which have become a research hotspot in recent years.However,a-IGZO TFTs suffer from direct current(DC)bias stresses,resulting in devices performance degradation in practical applications.Therefore,the first part of this paper investigated the degradation of conventional a-IGZO TFTs under DC self-heating stress.Moreover,owing to the short development time of drain Offset a-IGZO TFTs,their model have not been studied.Therefore,the second part of this paper studied the on-current model of the drain Offset a-IGZO TFTs1.DC self-heating stress induced degradation of conventional a-IGZO TFTsFirstly,this paper investigated the typical DC self-heating stress induced degradation of conventional a-IGZO TFTs and found that the devices exhibit a complicated two-stage degradation.In the first stage,the transfer curves shift towards the positive gate voltage(VG)direction.While in the second stage,the transfer curves shift towards the negative VG direction,and the degradation of sub-threshold region is more significant than that of above-threshold voltage region,which causes hump current in the transfer curves.By studying the degradation of the devices under DC self-heating stress conditions of different gate voltages at constant high current,it is found that the degradation of the devices is determined by gate voltage.Then,by comparing the degradation of DC self-heating stress conditions at different drain voltages under the same gate voltages,it is found that the larger the drain voltages are,the greater the negative shift degradation in the second stage will be.In this paper,we consider that the first-stage degradation mechanism is mainly due to electron trapping effect Under the positive gate voltage,electrons are trapped at the interface between a-IGZO and the gate insulator or injected into the gate insulator,which makes the transfer curves shift towards the positive VG direction.Whereas the second-stage degradation mechanism is that the H2O molecules adsorbed in the passivation layer diffuse into a-IGZO and release extra electrons,then become positive charges H2O+ or H+.Those positive charges accumulate at the the interface between a-IGZO and the etch stop layer(ESL)due to the positive gate voltage,and then generate parasitic channel.With the increase of stress time,the positive charges are farther accumulated in the parasitic channel,and the electron trapping effect exists in the main channel,which makes the parasitic channel turn on earlier than the main channel.Then the hump can be observed.Under DC self-heating stress conditions of the same gate voltages,the larger the drain voltages are,the greater the negative shift of the second stage is,which is due to the spontaneous Joule heat under the DC self-heating stress Joule heat will increase the internal temperature of the devices,so the greater the drain voltages are,the higher the temperature rises.In this way,the procedure of H2O molecules releasing electrons into positive charges will be strengthened,which will increase the negative shift degradation in the second stage2.On-current model of drain Offset a-IGZO TFTsIn addition,this paper also studied the effect of drain Offset lengths(LDO)on the performance of a-IGZO TFTs,the threshold voltage(Vth),SS and off-current(Ioff)remain relatively independent of the LDO variation.By analyzing the relationship between current and voltage in the Offset region,it is found that it follows the Ohm's law.The resistance(RDO)in the drain-offset region is extracted by using Ohm's law,it is found that RDO and LDO present the power function relation and the exponent of power function increases with the increase of gate-to-source voltage(VGS).Based on this,this paper proposes an empirical formula of RDO.On this basis,by combining gradual channel approximation,channel length modulation effect and gate voltage dependent mobility degradation effect,the on-current model of drain Offset a-IGZO TFTs is obtained.It has achieved a good fit with the measured current-voltage(?-?)curves.