Optimization Of Multi-Channel Camera Controller With Single Link

Field Programmable Gate Array(FPGA) has the characteristics of the flexible and efficient, which is widely used in aerospace electronic systems in our country. With the increasing complexity of space system, the proportion of FPGA in the system gradually improve, its role in the whole electronic system is also increasing. Space engineering is very high for the reliability of the system requirement, which is especially strict reliability of such key components including FPGA. The high complexity and the high reliability requirement of system constitute one pair of contradictions which are difficult to reconcile.In support of sub-item topics which is included in major projects of national aerospace engineering, we designed a set of multi-channel camera controller based on single link. The controller receives the five-way output of digital video camera, and carries on the compression process. Camera resolution is different in different channels, each channel support video or static image compression coding, multiple channels can produce a variety of combination between working mode. The overall structure of complex systems, interfaces and more computing capacity, its FPGA design face greater challenges.After the completion of the first edition of design, the FPGA design resource usage rate and the clock frequency derating does not meet the system requirements.This paper deals with problems existing in the design of the first edition with a systematic and top-down analysis, which had done many optimization design for problems existing in the design and completed the optimization design of code implementation, a large number of verification in the actual system. The paper adopt the method of comparative analysis, based on an engineering example, systematically introduces the optimization design of the whole project, and deeply analysised the key points of them. Classification of engineering design on structure are firstly analyzed and optimized in paper; under the premise that meet the camera combination working patterns, the camera data buffer strategy is optimized; by integrating data block, external data storage model is optimized; by modifying the coding style, synthesis results are optimized; by improved algorithm, image processing efficiency has been optimized. In addition, the thesis of temporal constraint optimization, and how to use the assessment tool for analysis and so on were also made in-depth analysis. In addition, temporal constraint optimization, and how to use the assessment tool for analysis and so on also have done in-depth analysis.Using optimization method introduced in this thesis, we finished the second edition of engineering design. FPGA resources occupancy rate has fallen from 86% to 64% in completed design, the top clock frequency of actual is running from 96 MHz to 103.72 MHz, completed successful the established optimization goal.The paper analyzed and compared the optimum design method in the FPGA project has a strong universal, which has a certain reference significance in the optimization of other space FPGA engineering design, a large number of verification has done in the actual system.