Secure SoC Architecture Design And Modeling Based On PowerPC

Computer security continues to be an increasingly important concern in the design of modern systems. Many systems may have security requirements such as protecting the integrity and confidentiality of data and code stored in the system, ensuring integrity of computations, or preventing the execution of unauthorized code. With the use of embedded devices becoming diverse, more and more embedded devices has also become the target of hackers or malicious applications attack. To protect the security of sensitive data has become an important factor in computer design. It has become increasingly difficult to defend against malicious attacks only by software methods. It is more effective to defend against software malicious attacks by secure support in hardware architecture level. Currently, there are many models to defend software attacks by hardware architecture, such as TPM, secure processor architecture based on Out-of-order execution, ARM TrustZone and Intel TXT. However, China doesn't own secure processor technology with independent intellectual property. In 2006, IBM opened the source of PowerPC 405 to research educational institution. It made more and more people use PowerPC processor, which is regarded as the representation of RISC processor. What is more, the Suzhou China-core company in China has received IBM's PowerPC soft core authorization and thus we can develop our own secure processor technology based on PowerPC.In this paper, we studied the PowerPC based SoC architecture and relative secure technology and designed PowerPC based secure SoC architecture based on the hardware isolation. The main work and achievement is as follows:(1) This paper finished the overall design of hardware architecture. Including memory system, DMA, interrupt, registers, Cache and MMU, all the hardware resource is isolated to secure resource and unsecure resource. We finished the architecture extension design of those modules.(2) Based on the isolation hardware architecture, two software architecture designs are initially proposed.(3) This paper finished modeling of this architecture design using high level modeling in Rabbits simulation platform. And tests are completed to ensure the correctness and security.