Reconfiguration Technology Of FPGA In Embedded Image Processing System

With the fast development of electronic technology, flexibility, diversity and versatility of an open electronic systemhas attracte people. Reconfiguration of hardware and software functions according to certain rules of analysis and reasonable division achieves total or partial reconfiguration for system, greatly improves the resource utilization andversatility of the system and simplifies system design and rapid developments. Static FPGA reconfiguration technology can reconfigure the FPGA internal logic circuit to update the system using multiple programming features of FPGA without changing the condition of the hardware architecture. Traditional embedded image processing system designs specific hardware and software systems for the application requirements, and becomes a special device. In this article, the research purpose is to use FPGA reconfiguration technology in embedded image processing system, which enhances resource utilization, improves system's flexibility and versatility, and reduces difficulty of system update, in conditions of limited resources.This article researchs the principle and implementation of the static reconfiguration technology and dynamic partial reconfiguration technology in deep. On the basis of the principle research of static reconfigurable technology, this article proposes a design for FPGA static reconfiguration based on "FPGA+FLASH" hardware architecture, so that the embedded image process system can automatically reconstructthe the FPGA statically and reprogramthe the DSP, that is static reconfiguration capabilities. Embedded image process system using static reconfiguration technology, can save a lot of resources, improve resource utilization; while strengthen the flexibility and versatility of the system, greatly reduce the secondary development cycle. This article also uses the FPGA dynamic partial reconfiguration technology in the image feature detection and match system platform, achieves dynamic partial reconfiguration between the SIFT and SURF feature detection modules in SIFT+ BRIEF and SURF+BRIEF image match method for different environment requirements. FPGA partial reconfiguration technology enables dynamic sharing of resources reuse, improves resource utilization and reduces FPGA power consumption; and has a broad prospect, and the research for principle and application of reconfiguration technology has important research value and practical significance.