Research And Implementation Of High-throughput CCMP Protocol Based On FPGA

With the popularization of the wireless network, its security is facing enormous challenges, and WEP encryption algorithm 802.11 b standard adopted has been unable to resist the attack of key recovery. Therefore, IEEE published 802.11 i wireless security standard to offer a good level of security in 2004, which mainly contains a secure and efficient CCMP encryption protocol. With the upgrading of the wireless network speeds, the throughput based on software and traditional hardware implementations cannot meet the demand, thus an efficient parallel FPGA hardware platform to implement CCMP protocol is needed.This paper designs a FPGA based hardware system of CCMP protocol with high throughput, which based on the research of the protocol mechanism and the AES encryption algorithm. First, the architecture will be divided into four main parts of the high performance AES module, AES_CCM module, formatting module, control module. Then the sub-modules are designed, and take the round fusion technology in achieving AES mode, thus reduce the number of cycles to improve data throughput. In the implementation of AES_CCM module, dual AES nuclear technology is used to ensure AES_CBC_MAC module and AES_CTR modules in parallel, and also to improve efficiency. A data buffer structure is designed, so that the system has better compatibility in order to deal with different rates of data streams. And in the designs of the main control module and sub-modules, optimizing global control signals with other methods can reduce the critical path delay. At last, a high-throughput FPGA system of CCMP protocol is designed on the basis of different technologies.Both simulation and verification are operated in Modelsim and integrated logic tool. Then in the Xilinx Vi vado development environment targeting Virtex-7 FPGA, results of implementation and timing analysis indicate that data throughput of the system can be up to 2.185 Gbps. At last, a performance comparison in different terms against similar work shows that the system design is reasonable with higher throughput and higher resource utilization.