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Acquition And Processing Module Hardware Design Of High Definition Digital Oscilloscope

Posted on:2019-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:K P LiFull Text:PDF
GTID:2322330563454022Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
In the field of modern electronic measurement,the signal characteristic is developing toward high frequency and complex small signal field.To capture and analyze these small signals accurately,we need an acquisition system with higher sampling rate and higher sampling precision.Analog-to-digital converter(ADC)is the core of Acquisition system.Because of the limitation of the ADC chip,the oscilloscope with both high sampling rate and high vertical resolution has not been issued by domestic research institute,which can meet the need of market.For this purpose,this design basing on the project of high definition digital storage oscilloscope,research on the acquisition and processing system with high sampling rate and high vertical resolution,and then built the hardware platform of the project.The main index are: 20 GSPS real-time sampling rate,10 bit vertical resolution and 500 Mpts storage depth.The main contents of this study are as follows:1.Researching on the scheme of high-speed high-definition sampling technology,the acquisition system built by 4 ADC which has 5 GSPS sampling rate and 10 bit vertical resolution with alternating time parallel sampling is designed.According to the characteristics of the parallel acquisition system and the special need of clock,the signal driven circuit and the ADC sampling clock circuit are designed.And in order to solve the phase error of multichip ADC data,the calibration module based on time broadening circuit is designed.2.The core of data processing system is programmable logic device(FPGA).Researching on the I/O and clock resources,this paper presents a high-speed data reception and reduction scheme based on ISERDES2 and IDELAY2,and then design the scheme of the system clock.3.The scheme of using external DDR3 memory to build deep memory of the high resolution data is been made.Considering the 10 bit wide and high-speed of the data,this paper use the IP core MIG(the Memory Interface Generator)supplied by Xilinx company to control two pieces of external memory chips.With the data storing by memory separately,the index of 500 Mpts storage depth is accomplished.Extending the deep memory mode,the segment-storage technology is realized by dividing the storage space.This technology can store more valid data with limited storage space.It also can enrich the display mode and provide a basis for the analysis of back-end waveform data.After testing the prototype,it can be told that the high-resolution data acquisition and processing system can reach the target of both high sampling rate of 20 GSPS and the high resolution of 10 bit.In deep storage mode,500 Mpts storage depth of single channel and the function of the segment-storage can be realized.The performance of this machine reaches the domestic advanced level.
Keywords/Search Tags:High Speed and High Definition Data Acquisition, Time-Interleaved Acquisition, Mass Storage, Segment Storage
PDF Full Text Request
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