Design Of Sampling Data Storage And Transmission Module For 40GSPS Digital Oscilloscope

The signals encountered by scientific researchers in scientific research work are becoming more and more complex,with the electronic information technology developed rapidly.In order to meet the requirements for the collection and analysis of complex signals,it is inevitable to study data acquisition systems with high sampling rates.This article is devoted to the research of the key technology of high-speed data acquisition module.The multi-ADC parallel acquisition array based on TIADC technology completed the design of the 40 GSPS oscilloscope.Its main specifications are:40GSPS maximum real-time sampling rate,4GHz analog bandwidth,10 bit vertical resolution and 5.6bit the effective number of digits.The followings are the main research contents of this article:1.Complete the frame design of the TIADC acquisition system.Through research on sampling technology and TIADC technology,the overall framework of 40 GSPS data acquisition module is designed.The key modules of the system are analyzed in detail,and the design scheme of each module is given.2.Study the problem of synchronous reset in the sampling of the parallel system and the design principle of the synchronous reset signal,and complete the synchronous storage of the sampling data of multiple ADCs.For the 40 GSPS system of this project,a single ADC data reception synchronization scheme and correction algorithm,a multi ADC sampling synchronization scheme and correction algorithm,and a data storage synchronization automatic correction algorithm based on FIFO(First Input First Output)storage unit read and write signal delays are proposed.Finally,the synchronous and stable storage of multi-channel collected data in the 40 GSPS system is realized.3.Design the inter-board transmission module based on the GTX(Gigabit Transceiver)serial transceiver to realize the transmission of ADC sampling data with a rate of 5Gbps.The hardware control command transmission module is designed and implemented based on PCIE(Peripheral Component Interconnect Express)core.Through the debugging of the acquisition module and the test of the overall performance,the 40 GSPS oscilloscope designed in this project has 40 GSPS maximum real-time sampling rate,4GHz analog bandwidth,10 bit vertical resolution and 5.8bit the effective number of digits,which meets the development requirements.