The Design And Implementation Of Synchronous Communication Card Based On FPGA

In the field of military enhanced portable computers, serial telecommunication has been adopted as an important tool to assist the transmission between external sensors or controllers and the central computer, with the consideration of liability and cost. Meanwhile the synchronous telecommunication, due to its high rate and accuracy, has been replacing the usage of asynchronous mode when performing serial telecommunication.In this paper a high speed synchronous serial telecom card is designed, in order to meet the requirement of liability and flexibility for military telecom equipments. This card uses RS485 as the serial bus to transfer the data and/or command which is framed in the HDLC protocol. All received data will be transferred to the central processor with CPCI bus which has been adopted widely for many years in the measure and control industry.The greatest strength of this design is using one FPGA to implement all of a HDLC controller, a CPCI controller and a dual-ram. With this solution, the complexity of the board is reduced and therefore its liability is enhanced. The usage of FPGA can increase flexibility, i.e. simply adding or deleting one HDLC channel, or increasing the size of the dual-RAM for each HDLC channel.