Research On AIS Baseband Algorithm Based On FPGA

With the rapid development of modern shipping traffic, safe navigation of the ship is more and more important. The Automatic Identification System (AIS) is an automated tracking system used on ships. It can let the ship which equips the AIS communicate with the ship nearby and ship-shore AIS stations to prevent collision using radio technology. And it can facilitate regulatory management to improve the safety of navigation.AIS equipment is composed by man-machine interface, communication protocol processing module, baseband signal processing module, RF module and the standard communication interface module. This article focuses on the AIS equipment baseband signal processing module simulation. Based on simulation, a research baseband modulation and demodulation algorithms using in FPGA hardware platform is given. The algorithm is given a solid basis for theoretical algorithm to realization AIS equipment using FPGA hardware platform.AIS baseband processor main task is to pack and unpack HDLC data frame and GMSK modulation and demodulation. As FPGA platform can only handle digital signals, modulate and demodulate algorithm of part of analog signal need a further study to adapt whit FPGA hardware platform. HDLC mainly include bit stuffing and deleting bit stuffing, generation CRC, encoding and decoding NRZI etc. For HDLC processing is digital signal processing process, so the HDLC's FPGA-based algorithm is relatively simple. GMSK modulation and demodulation is analog way of digital signals. When study GMSK signal, the first step is study its properties and verifying the analog algorithm using System View and Matlab. The second step is study digital algorithm using in FPGA hardware platform, besides bit synchronization need consider when use in practical application. FPGA have the feature that design flexibility, versatility, high real-time and so on. So FPGA is suitable for implementation in the AIS hardware platform. Besides, choosing FPGA as the hardware platform is for single-chip realization AIS equipment solution's basic work. In this paper, it mainly study the following aspects:1) CRC checksum generation algorithm and the fast algorithm in the FPGA; 2) Bit stuffing and deleting bit stuffing in the FPGA implementation; encoding and decoding NRZI algorithms in the FPGA implementation;3) The GMSK modulation and demodulation algorithm;4) Gaussian filter fast algorithm in the FPGA;5) Phase integral real-time algorithm in the FPGA;6) IQ Modulator real-time algorithm in FPGA;7) Bit synchronization real-time algorithm in the FPGA;8) Arctangent real-time algorithm in the FPGA.This paper starts for the AIS definition, characteristics and the current development at home and abroad. And considering the AIS's function of baseband signal processing, it focuses on the HDLC packed and unpacked, GMSK modulation and demodulation theory, algorithms, and FPGA-based algorithm.