The Multi-Processor Computer System (MPCS) discussed in this paper aims at the radar data synthesizing. It includes the hardware and software. The hardware architecture of the MPCS was designed mainly according to the PICMG2.16 packet switching backplane specification. The CPU modules of the MPCS communicate with each other based on the embedded Gb Ethernet, which provides high bandwidth and no communication bottleneck problems restricting the performance of the MPCS.The work of this paper focus on the hardware development of the MPCS, mainly includes:1) CPU board design for the MPCS. Intel Pentium Mobile IV was selected as the processor chip; Intel 855GME and Intel 6300ESB were used as the north bridge chip and south bridge chip relatively, which provide optimal support for the processor.2) Some research work was done on high speed board design. Perform the CPU board layout and trace design according to the Intel design guide;3) Back plane design for the MPCS. The backplane of the MPCS was designed according to the PICMG2.16 and PICMG2.11 specificaiton. |