Optimal Design And Reliability Study Of 1.2kV SiC MOSFET

Silicon Carbide (SiC), which is the representative of wide band-gap materials, has been touted as the pre-ferred semiconductor material for the next generation power devices because of its superior electrical and thermal characteristics. Compared with silicon (Si) devices, power MOSFETs based on SiC have much lower on-state re-sistance, higher switching speed and higher thermal conductivity, which can be widely used in high-voltage and high-speed power systems. Nevertheless, the design and reliability study of SiC MOSFETs are at an early stage, which still require further investigations.This thesis aims to design a highly reliable 1.2kV SiC MOSFET. Firstly, the influences of the cell structure (including epitaxial drift layer, P well, accumulation region, and channel region) upon the forward conduction characteristics, blocking characteristics, and capacitance characteristics have been analyzed by simulations. Sub-sequently, the influence of gate pad structure (including floating P well) and termination structure (including field plate, rings connected to source electrode, and floating field rings) upon the blocking characteristics are simulated and investigated. Finally, based on the simulation results and analysis, the entire design scheme of 1.2kV SiC MOSFET is proposed. The simulation results show that the designed device has a breakdown voltage of 1800V, a on-state resistance of 200mΩ, a threshold voltage of 2.3V, a input capacitance of 66pF, a output capacitance of 17pF, and a reverse transfer capacitance of 2.9pF, which have achieved the expected design index.Besides, the behaviors for 1.2kV SiC MOSFETs under high temperature reverse bias (HTRB) stress, high temperature gate bias (HTGB) stress, and unclamped repetitive stress (URS) have also been investigated. It has been shown that, the device has a stable performance under HTRB and HTGB stresses. But when the device is under URS condition, the electric field and impact ionization in the accumulation region become sufficiently large, so as to generate numerous hot holes, which will be injected and trapped into the gate oxide, consequently leading to an increase in drain-source leakage current. Moreover, an improved device with step gate oxide is proposed, which can improve the reliability of the device under URS condition by 25%.