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Design Of Frequency Synthesizer Based On Superheterodyne Receiver

Posted on:2016-07-16Degree:MasterType:Thesis
Country:ChinaCandidate:Y LuoFull Text:PDF
GTID:2308330503476423Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the development of wireless communication and wireless control, wireless control device has to cover all areas. There have not been mature chip yet on this area in China. The currently existing chips mostly come from foreign companies. There is a little deficient chips designed reversely in China. The huge domestic market demand promotes the formation of the industrialization projects. Frequency synthesizer can generally be divided into three categories:direct analog frequency synthesizer, direct digital frequency synthesizer and PLL frequency synthesizer. Due to ease of integration on-chip, PLL structure is used in present majority of mobile communication chips, also used in this paper for researching.Content of this paper is the design of frequency synthesizer in superheterodyne receiver, analyzed various types of frequency synthesizer structure, summarized the principle of superheterodyne receiver and various frequency synthesizers including integer and fractional type. According to the actual requirements, selected integer frequency synthesizer and analyzed its sub-module and loop system. In this paper, PLL-type frequency synthesizer’s core sub-modules include:VCO, Divide, PFD, CP and LPF. Analyzed all sub-module design in detail, and provide integrated design and layout process, finally finished the frequency synthesizer by 0.5-μm CMOS MPW, realized 300~450 MHz frequency lock range,3-5.5V voltage range,-40~125 ℃ operating temperature range,<2 mA operating current,>200 mV signal output. Different circuits are used to check process corner in the design of ring VCO, realized voltage-controlled characteristic with wide range of broadband, voltage, temperature by unique process compensation. In high speed CML divider design, compensating circuit is added for output voltage and tail current automatically control. Realized the full NMOS switch charge pump and the circuit of high response speed charging. For product-chip design, an LDO is added to reduce the power consumption and noise, and a system current mirror control circuit is added for adjustment and testing, an over-current testing circuit is added to reduce the risk, and the function of over-current automatic recovery is realized to ensure chip regular working.The invention of frequency synthesizer is to produce high precision clock multiplier or synchronized. It applies to a variety of specific receivers, transmitters, communication modems, generation of synchronous clock in digital integrated circuits.315-MHz and 433.92-MHz superheterodyne transceiver chip referred to this report are used very extensive because of its licence-free frequency range.
Keywords/Search Tags:superheterodyne receiver, frequency synthesizer, PLL, ring VCO, CML divider, process corner compensation, NMOS switch CP
PDF Full Text Request
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