Key Technology Research & Implementation Of 2.4Gsps ADC Data Acquisition System On PXIe

With the improvement of global semiconductor technology, it allows the high-speed ADC data acquisition system to develop rapidly, which is widely used in scientific research, medical, aerospace and other fields. As PCIe extensions for instrumentation, PXIe includes such traits as high data throughput, low latency and modular instrument integration, improving greatly the transmission performance of the ADC data acquisition system. Regarding high-speed data acquisition system as the issue background, this article has completed the self-designed 2.4Gsps ADC data acquisition system based on PXIe, what’s more, it has researched and implemented the key technology which is aimed at ADC in high sample rate applied to PXIe.To research the key technology of the high-speed ADC data acquisition system better, This thesis analyzes the high-speed data acquisition theory in three areas: high-speed analog-to-digital converter principle, high-speed data flow processing method and signal integrity problems, at the same time it clarifies the key of the high-speed data acquisition hardware design. This article formulates the reasonable hardware implementation scheme based on the basic structure of sampling-cache-transmission that is implemented using FPGA, implementing high-speed analog-to-digital conversion whose sampling performance is up to 2.4Gsps, DDR data caching whose memory bandwidth is up to 2.4GB/s and PXIe data transmission.This thesis focuses on three key problems in terms of hardware design:high-speed ADC clock driver, signal processing and the design of power distribution system. Clock driver is provided by the radio frequency PLL synthesizer which generates the low jitter and low temperature drift clock signal of 2.4GHz clock. Signal processing uses the differential amplifier as the pre-stage driver, which is aimed at reducing noise of signals. To meet the requirements of each module’s power consumption and guarantee the stability of the hardware circuit, power distribution system is designed reasonably based on PXIe.For FPGA design, this thesis solves five key technologies:global clock domains processing, ADC interface technology with high-speed, high-speed ADC data caching and control, the elastic control technology of data flow and PCIe communication technology.The test tools is developed by using the software of LabWindows/CVI, and the testing platform is constructed for the system. Finally, this thesis provides the test results of power supply, clock and the pre-stage driver. The functionality of 2.4Gsps ADC data acquisition system in different mode has been tested, and its performance has been analyzed detailedly. Test results verify the correctness of key technology research, embodying its practical value used in high-speed ADC data acquisition system.