Researches On Key Technology Of Digital Calibration For An Ultrahigh Speed ADC

The digital signal processing technology has been extensively used in wireless communication, but it needs to transform analog signal to digital one before processing, which can be performed by ADC. With the advent of the era of big data, it is very hard to achieve high-speed and high-resolution by a single ADC. Time-interleaving of ADCs is an attractive way to increase the overall sample rate in a given technology while keeping the high resolution.However, it is quite a pity that there still exists some mismatch errors, such as gain,offset, nonlinearity, time mismatch and so on. These mismatch errors may reduce performance of the system, such as signal-to-noise-and-distortion ratio. Dealing with these mismatches with the digital calibration technique has been an effective way.This work contains the following three parts: Firstly, an equivalent error model with channel nonlinearity mismatch errors is established, which is the foundation of designing the digital calibration scheme.Secondly, several digital calibration algorithm for time mismatch have been proposed, which can be divided into estimation and calibration one. To estimate the mismatch errors, two approaches, which are foreground and background techniques, are discussed. Meanwhile, we modify the background techniques to protect the technique from misconvergence.Thirdly, based on the spectral characteristics of TIADCs, we research on calibration algorithm for nonlinearity mismatch, which contains a foreground estimation method and a compensation method using a cascaded structure of adders and multipliers. Through behavioral-level simulations, we prove the validity of the derivations and demonstrate that the proposed estimation and compensation method can bring a considerable amount of improvement in the combined TIADCs dynamic performance. When the frequency of input signal is 10.51 GHz, and the sample rate is 64 GSPS, SINAD can increase more than1.96 dB.