Font Size: a A A

Research On Key Technology Of High Speed DDS Based On FPGA

Posted on:2017-02-08Degree:MasterType:Thesis
Country:ChinaCandidate:L JiFull Text:PDF
GTID:2308330485984631Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
Comparing with traditional frequency synthesis technology, Direct Digital Frequency Synthesizer(DDS) has such advantages as high frequency resolution, fast switching time, continuous phase, synthesis complex waveform easily. With the increasing of needs in science and technology, DDS has been wildly applied in communications, radar and varieties of electronic systems. As a result of processing in the digital domain, which has rich spurious, and disadvantages of limited output frequency range. To improve the working frequency and output signal performance of DDS, this paper researches phase accumulator and amplitude-phase converter in DDS based on FPGA, which mainly includes:1. This paper theoretically analysizes spurious in DDS, and simulation model is established respectively on the phase truncation error and amplitude quantization error, and mainly studies the technique of phase jitter suppression of spurious.2. This paper researches high speed phase accumulator, and mainly researches and compares pipelined adder, ahead carry adder and parallel adder. Combined with the pipeline and parallel adder their advantages to realize pipeline parallel adder. The structure balances resource consumption and work speed very well.3. This paper researches algorithms which can increase the speed of phase transformation, and mainly researches and compares angle decomposition algorithm, pipeline CORDIC algorithm, Taylor series’ linear interpolation algorithm. ROM + CORDIC algorithm reduces the ROM capacity as well as avoids the iterative process of CORDIC algorithm. Based on the phase recoding, it can calculate the amplitude values directly. The algorithm can improve the output signal frequency and spurious free dynamic range, and its resource consumption is obviously less than pipeline CORDIC algorithms in the same conditions.4. This paper uses DDS to generate a 1.6 GHz sampling frequency, 1.2 GHz center frequency, 400 MHZ bandwidth LFM signal. As FPGA chips cannot work at 1.6GHz, eight-channel multiphase structure is adopted in the FPGA, the parameters of each channel are derived according to the formula. And then the two-channel signal input to the AD9739, which synthesised by the eight-channel signal through OSERDESE. By mix mode in the AD9739 take the second-Nyquist zone signal, namely the pass-band 1.0 GHz ~ 1.4 GHz of LFM signal. After signal passed the bandpass filter, spectrum analyzer shows the spurious free dynamic range of the output signal is about-40 dBc.
Keywords/Search Tags:Direct digital frequency synthesizer, Coordinated Rotation Digital Computer algorithm, Linear Frequency Modulation Signal, AD9739
PDF Full Text Request
Related items