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Research On Key Issueses Of Resistive FPGA

Posted on:2017-03-11Degree:MasterType:Thesis
Country:ChinaCandidate:X Y GongFull Text:PDF
GTID:2308330485488292Subject:Microelectronics and Solid State Electronics
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With the constantly development of integrated circuits manufacturing technology, the integration level of FPGA has increased dramatically, making its size, power consumption and costs reduce to a relatively low level even when compared with ASIC. Combined with its strength in the area of dynamic reconfiguration, FPGA has become a promising alternative in replacing ASIC to be the major platform for digital circuit implementation. However, today’s mainstream FPGA uses SRAM as the storage of configuration data, which is known as a volatile memory. It requires a on-board nonvolatile memory such as PROM and FLASH memory for storing configuration data. when the FPGA circuit is powered on, configuration bit stream is loaded from outside chip to the FPGA, making the configuration data easily stolen. In addition, the PROM and FLASH memory occupy a considerable board area, thus increasing the total area of the digital system. To solve the problems mentioned above, a solution by integrating the memristor to the SRAM-based FPGA is proposed in this article.As a novel memory device, the memristor is non-volatile and reprogrammable, and is also compatible with standard CMOS manufacturing process. Making use of the trait of memristor by combine it with SRAM, a novel programming point called ReSRAM comes to reality. ReSRAM-based FPGA can be quickly powered up, and the configuration information safety in which is also greatly improved. Based on ReSRAM, a novel non-volatile ReLUT(Resistive Look-Up-Table), a progrramble switch and a programming path are also design and verified.The circuit in this article is simulated in the Cadence AMS simulation platform. A Conductive-Filament-based Verilog-AMS memristor simulation model and SMIC 0.13μm PDK is used in the circuit simulation.The simulation result and theoretical analysis proves that the proposed ReLUT is fully compatible with the traditional LUT, and the circuit delay of the programmable switch has no difference with its counterpart in SRAM-based FPGA, making it possible for Resistive FPGA to directly use the mature routing CAD of the SRAM-based FPGA, further increases its compatibility and application value.
Keywords/Search Tags:memristor, RRAM, FPGA, configuration architecture
PDF Full Text Request
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