The Analysis Of Memristor-chaotic Neural Network Based On FPGA

The brain computing attracted wide concern as a new non-traditional computing system by imitating the structure and working principle of biological neural system.It was expected to realize more energy saving,more efficient and intelligent computing system,which brings revolutionary breakthrough in the field of co mputing,storage,artificial intelligence.The ultimate form of the brain computing is the chip or computer.In the field,the very challenging technical problem is how to realize the biological neural network with hardware.The Memristor(memory resistor)because of the memory and maneuverability which is similar with the neuron synapse of the biological neuron is used to simulate the brain structure and function in the brain computing.Based on FPGA,we simulated the Memristor electrical characteristics and researched the realization method of the chaotic neural network with the Memristor as a basic device.The main work is as follows:1.The analysis of the Memristor model and the establishment of digital model.Based on the HP boundary transfer model,the derivation of the mathematical model was made and the electrical characteristics were analyzed.Then the ordinary and pipeline model with DSP Builder were established and the electrical characteristics of the simulation model was verified.2.The establishment of HH neuron model and analysis of Aihara neural network.To verify the possibility of realizing neuron with hardware,we established the HH neural digital model and simulated the response of the neuron membrane potential under the impulse current.The Aihara chaotic neural network mathematical model was deduced and simplified to make it easier for design and implement with the pipeline thoughts.Then we established the single neuron model and analyzed the chaos of the output sequence.3.The exploration of the way of combining Memristor and neural network and the establishment of pipeline model of Memristor chaotic neural network.The feasibility of the combination of Memristor and neural network was verified on mathematical model.Then the Memristor chaotic neural network digital model which included four neurons was designed with the Memristor as internal feedback weights of the neural network.Finally,the chaos of the neurons outputs was analyzed.4.Transformed the digital model into a hardware description language,then made timing simulation on FPGA hardware platform and simply realized the Memristor chaotic neural network.