Design Of N-channel Vdmos With Breakdown Voltage Of 1500v

Power MOSFET is a key member of the power semiconductor devices. Because of its advantages such as fast switching speed, high input impedance, negative current temperature coefficient, low driving power, it is widely used in the power integrated circuit and power integrated system, for instance, switching power supplies, motor drivers, energy-saving lamps, automotive electronics. Therefore, Power MOSFET plays a decisive role in the application of power electronics.As commercial VDMOS is becoming more and more mature, for high voltage VDMOS device, the higher the voltage is, the higher resistivity and the thicker of epitaxial layers is. Under the same resistance, it requires larger area and higher cost than that of the low voltage devices. Therefore, reducing the specific on-resistance is beneficial to improving its market competitiveness. Nowadays high voltage VDMOS devices based on our own process are rare and they mainly depend on import. It is urgent to design high voltage devices based on domestic process. As a result, to design and manufacture the N-channel VDMOS with breakdown voltage of 1500 V is of great importance.This thesis is based on a project in cooperation with a well-known domestic foundry. First the cell and terminal parts are simulated and optimized, and then the layout is drawn, The ultimate goal is to fabricate a N-channel VDMOS with the breakdown voltage BVDSS >1500 V, drain current ID = 4A, on-resistance RDS(on) < 7 Ω, reverse recovery time TRR < 510 ns.In the first part of the thesis, main advantages and the working principle of VDMOS is described, as well as the the main static parameter, dynamic parameter and the principles of terminal. Based on the proper high process which is designed before simulating, a suitable structure for the cell and terminal is proposed. Then TCAD simulation tools, TSUPREM4 and MEDICI, are used to optimize the parameters. Final results are as follows: breakdown voltage BVDSS =1705 V, specific on-resistance Ronsp=84 Ω·mm2, the threshold voltage Vth=3.8V. According to the simulation results and the process abilities, the layout is drawn, followed by the second tape-out of the device. Finally demanding testament of packaged chips are conducted. Under a voltage of 1605 V, the following results are achieved, Vth =4.5V, Ron=5.75 Ω, tr=11.4ns, tf=28ns, trr=270 ns. All results meet the demand except the capacitance, some of which are better.In conclusion, VDMOS with 1500 V breakdown voltage is successfully designed and manufactured in the thesis. A domestic platform for high voltage VDMOS is developed, breaking down monopolization of VDMOS products and setting a milestone in the development of commercial VDMOS.