A Low Power Low Voltage And High Precision Bandgap Reference Used In 65nm CMOS SoC

This paper describes the design and implementation of a low power, low voltage and high resolution band-gap reference circuit under the TSMC 65nm CMOS process. In the circuit, a high gain amplifier is designed in order to get the desired accuracy of band-gap reference circuit and to eliminate the effect of offset voltage and low frequency noise. In the layout design, we have considered such problems as the matching between the devices, noise coupling, parasitic effect, and so on. The band-gap reference circuit has successfully taped out on the TSMC 65nm CMOS process. The power supply is from 1.6V to 2.0V, and the power dissipation is less than 150uW. When the temperature varies from 0℃to 125℃, the temperature coefficient is less than 10ppm/℃, the output voltage is fixed from 1.24v to 1.25v. The power supply rejection is higher than 55dB. The whole block area is merely 0.03 mm 2 .