FPGA-based Matrix Inversion IP Core Design Technology And Related Experi- Ment Platform Design

Matrix operations have been widely used in research areas like scientific compu-ting,digital singal processing and image processing.due to the increase of calculation cost and algorithm complexity,the classic hardware platform is hardly to achieve the requirement of real-time computing. since the FPGA boards have a higher computing speed,and are more flexible and able to work in pipeline,they are advantaged to be used in matrix manipulation.Considering the analysis above, in this thesis, we design IP cores and its experi-mental platform for matrices inversion based on the FPGA method. It focuses on shortening the running time and obtaining a higher efficiency, which will have an im-pressive engineering application value.This thesis compared three kinds of widely used matrices inversion methods from aspects of the application range, the computation results accuracy and the algo-rithm complexity. Given that FPGA has rich storage resources, flexible memory ad-dress and mature pipelining technique, an adaptive Cholesky decomposition method is employed, which skillfully gets rid of the evolution operation, since the evolution operation is an obstacle in the classic algorithms.The design in this thesis developed universal IP core interfaces for inversion op-eration on the AXI4-S bus. Meanwhile, the IP core interfaces for inversion operation are arranged in a pipelining structure. Then, based on the work mentioned above, the design of inversion operation IP cores based on IP cores interfaces for inversion oper-ation is realized.Additionally, the related hardware scheme on the experimental platform is de-veloped, including the hardware circuits of the power supply solution, the storage system, the clock module, the ADC sample module and so on. The verifications for the functions of the IP cores are also implemented on this platform.