Hardware Implementation Of Sample Matrix Inversion Algorithm Based On FPGA

Broadly speaking, beamforming is one of the key technologies of the array signalprocessing which operatas the space array signals with phase-shifting, weighting andsummation. In this paper, through analysis and comparison bettewn several beamformingalgorithms, we selected the SMI algorithm as the weighted algorithm implemented on FPGA.Adaptive diagonal loading techniques is also used to improve the SMI algorithm. Simulationresults show that the improved algorithm has stronger self-adaptability and betterperformance both in a lower number of snapshots and higher signal-to-noise ratio.The accuracy is a important factor affecting algorithm success when implemented in thehardware design. While the fixed-point in complex computing process is prone to overflow ordiscarde the mantissa which results in erroneous results. Floating-point number has a greaterdynamic range than the fixed-point, thus it has very important application value inhigh-precision and a wide range of data computation applications, especially for theapplications on FPGA with bit operating advantages to realize the floating-point operationsare of very important significance.The paper utilized data pre-processing method, the real data operations in the algorithmwas directly conducted on the FPGA, reducing the difficulty of realization. Then gave out thesystem hardware designing, some part of the hardware circuits including data acquisition,serial-to-parallel conversion were introduced. We also pointed out the meaning andadvantages of high-speed serial data transmission. Detailed description of the serial/parallel-to-serial converter circuit designing requirements and debugging process wasemphasized the same time. Floating-point operations of addition, multiplication, multiply-add,division operation are the foundation for hardware implementation. In this paper, we not onlygives out the designing ideas of floating-point module, analysis of the implementation ofthe divider module together with a better realization of the program, we also gives outmodular programs for floating-point arithmetic with different standard in differentapplication.Matrix operation is the basis of many algorithms, but the inverse matrix is a majordifficulty in the hardware implementation. This article describes matrix operationsimplemented in hardware, and inversion for real positive definite matrix is the main point. After analysis on the inversion algorithm and characteristics of hardware impletation,combining with the mode of operation of the state machine, we proposed inversion methodfor any order real positive definite matrix. The simulation results proved that it would have avery wide range of applications and very convenient portability which is of great significancein the FPGA-based digital signal processing. Finally, a simulation result of the overallimplementation of the weighting algorithm was presented. In addition, we conducted thesystem timing and logic analysis for the overall designing, providing a higher speed solutionto achieve the program.