Design And Implementation Of Hardware Accelerator For I-vector Voiceprint Recognition Algorithm

In recent years,voiceprint recognition,as a kind of biometric recognition,has attracted more and more attention.With the development of technology,it has been gradually applied to various scenes of daily life.I-vector is the best model in Text-Independent voiceprint recognition in most cases.This paper focuses on the acceleration work of ivector voiceprint recognition algorithm based on FPGA.Firstly,based on TIMIT data set,the software algorithm of i-vector is quantitatively analyzed,and a statistical averaging method is proposed to unify the data scale,and the data normalization is used to narrow the data range.At the same time,the software algorithm of I-vector is fixed by using the fixed-point simulation tool of MATLAB.Secondly,we design and implement the complex sub-modules of i-vector algorithm,including: high-performance configurable matrix multiplication module,which can adapt to six scales and three data scheduling modes of matrix multiplication of i-vector algorithm through simple configuration,and achieve near-peak performance through pipelining;fine-grained parallel Cholesky decomposition is optimized based on component reuse and fine-grained pipelining of upper triangular matrix is optimized based on data reuse,to reduce computing delay and hardware resource consumption.A variable stack-by-stack debugging module for pipelining structure is designed,which can help to locate the problem quickly and reduce the difficulty of development.Finally,by analyzing the running time of each step of the i-vector software algorithm and calculating memory access,the three-stage pipeline structure of the accelerator is determined,and the design and performance evaluation of the three pipeline stacks are carried out respectively.The final design scheme is determined and compared with the performance of the CPU platform.In terms of time performance,this design can achieve a maximum acceleration ratio of 1.59 times and a maximum acceleration ratio of 14.19 times in terms of power efficiency performance.