A Simulator For The FPGA-based System-on-Chip

In the research of computer architecture, the highly customized system based on FPGA is very particular way. The solution with the highly customized CPU,I/O and system can provide a lot of advantages in the research of computer architecture. For the reason that there’s some limitation of development timeliness, flexibility and convenience in the FPGA based system, a corresponding simulator is very necessary. The simulator must be able to have all the functions of the origin system, including CPU, I/O, peripherals and so on, which will make the developer switch between these two systems easily. In the meantime, the simulator also have humanize UI and a debug module that is easy to use. That is to say the developer can do research without the FPGA board.The main work that I did in this paper is:1. A perfect CPU simulation, which has the same function as the hardware on the instruction set, co-processor 0, interrupt and memory management unit. In the meantime I optimized the CPU to make it have high efficiency. Then the debug function that the hardware doesn’t have is made to make the simulator more conveniently.2. Simulation for the bus and peripherals, including the extendable device interface and the normal peripherals on the FPGA board, which guarantees that the users will have the same experience as the FPGA based system.3. I provided a humanize UI, having developed a monitor and editor for the memory and registers, a debugger with break point function and controller for interrupts, which can make the system be used more quickly and intuitively.Now the simulator is almost done, is have complete simulation functions and is running very stably, so it is now can be a powerful tool in the research of computer architecture.