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A Study And Design Of Digital IF DS/SS

Posted on:2016-12-25Degree:MasterType:Thesis
Country:ChinaCandidate:Q W ZhouFull Text:PDF
GTID:2308330482453057Subject:Electronics and Communications Engineering
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Spread spectrum communication system expands base band signals to a much greater bandwidth for transmission. It provides very good performance in anti-jamming and secret communication. It can be widely used in spaceflight and national defense area Direct Sequence spread spectrum(DS/SS) system is one of the widely used spread spectrum systems. The target of this thesis is to design an IF DS/SS receiver to be used in the next generation of national defense spacecraft communicator.The core technique of the DS/SS system is demodulation of IF DS/SS signal, which has two key parts, sequence synchronization and carrier synchronization. An important task of a DS/SS receiver is to generate a local replica of the transmitted PN sequence and to synchronize its phase to that of the incoming one. This synchronization process is typically accomplished in two stages:acquisition and tracking. In the first stage, the phases of the two sequences are aligned to within a small range of one chip or less. Then the tracking loop makes the fine adjustment and maintains the two sequences in synchronism. After studying the performance of different pseudo sequences, acquisition schemes, tracking scheme s and adaptive threshold methods, I chose the most suitable schemes to design the system by considering the acquisition time and system complexity. Another important task of a DS/SS receiver is to synchronize the local oscillator to the receiver carrier, it is usually accomplished by a phase lock loop. Using the digital demodulation scheme can reduce the complexity of debugging and increase the reliability of the system. After studying the band-sampling theory and the digital Costas loop, I setup the carrier tracking system.In final design, m sequence is used as the spread spectrum sequence, and multi-channel coherent acquisition scheme is used to capture PN sequence, instantaneous power-scaled detection threshold as the adaptive threshold. After acquisition, DDL begins to maintain the PN sequences in synchronism to the received one, a Cost as loop begins to track the carrier. Most of the system functionalities are realized by a single FPGA, which make the receiver’s structure much simple and easy to debug. The platform mainly includes the A/D conversion circuit, the FPGA minimum system, the RS422 interface circuit and the power management circuit. The whole digital signals processing parts of the baseband module are implemented in an FPGA, which helps to meet the requirements of low power consumption and miniaturization. The test result shows that the baseband module can achieve capture in larger Doppler frequency offset and it has the advantages of short capture time, low error rate and flexible parameter configuration, which achieves the expected goal. The FPGA-based solution can be used for different purpose by downloading different software, which make it of great flexibility, the record of experimentation is given, including data and picture. According the experimentation’s result, the system can run correctly.
Keywords/Search Tags:DS/SS, acquisition, track
PDF Full Text Request
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