Video Streaming Images Centerline Extraction Base On FPGA

Extracting the center of structured light stripe have important applications in thefield of image processing, is widely used in industrial production, medicine,aviationand other communication fields, such as extraction for two-dimensional structure lightcenter line position in 3D reconstruction, medicine for bone,blood vessel shapedetermination and in the air path recognition. But the characteristics for these digitalimage center line extraction is the amount of data to be processed, is particularly highfor the general PC,cannot meet the real time of processing requirements. Withthe development of microelectronic technology and processes, hardware FPGA designstudies based on digital image processing will become the new hot spot for theinformation industry. Because has the ability of parallel computing and hardwareprocessing ability, with field programmable gate array(FPGA) for digital imageprocessing to bring new ideas and new methods.The innovation of this paper is to use the direction and focus of the combinationtemplate method opproach as a method of image center line extraction,and used torealize image processing system based on FPGA. This center line extraction methodovercomes the traditional extraction method problem which the precision and thedirection is not good,and the FPGA processing system has overcome the question thattraditional computer processing speed is not high. This design of FPGA-based imageprocessing system consists of three parts: the video image acquisition, image centerline extraction, image display.The system innovation is the use of Altera company forlow cost market launch of a FPGA Cyclone III series of EP3C40 as the centralprocessor.The system consists of the video decoding module,image processingmodule,video coding module. First, the analog video signal transmitted by the CCDsensor in, and then converted by the video decoder chip SAA7113 analog signal into adigital video signal, and then after the image processing module to completecenterline extraction, and finally by a video encoder chip SAA7121 converts thedigital video signal to an analog video signal output by the display. FPGA as thecenter line extraction of the core of the hardware system, not only to complete thecentral line algorithm,but also responsible for configuring the video decoder andvideo encoder via I2 C bus, as well as the establishment of working DDR2 data busand control bus.The whole design and operation of the whole of each module is on Altera’sQuartus II platform development environment, and the use of third-party emulationsoftware Modelsim for simulation and logic synthesis experiments.Video capture andoutput signals of the system are the PAL, the image size is 720 * 576(pixels * pixels),frame rate of 25 Hz. Experimental results show that the use of FPGA hardware videoprocessing to meet real-time requirements and accuracy requirements, and insub-pixel accuracy rate is also much higher than the case of machine processingmethods of the PC.